Petri-Rig

Several distinct models of computation have already proved their adequacy for the embedded systems' design. Among these, we find state diagrams and other related formalisms, namely statecharts and Petri nets. This project explores the similarities among these formalisms in several directions: on one hand it groups them in one single methodology and associated development tools; on the other hand, it builds upon known developments in the Petri nets' field to propose the use of a class of low-level nets. This class is then used as the underlying system-level specification language to which all the mentioned formalisms are translated before being verified and implemented. A set of procedures will be formally defined enabling the partitioning of the model and identification of sub-models, from here on identified as components. Each component can be afterwards mapped into hardware or software, according to specific cost function metrics, using hardware-software co-design techniques. A set of tools will be developed, relying on the representation of Petri net models through the emergent PNML standard (being prepared inside ISO), that will be the glue to assure interoperability between the computational tools to be developed in this project and other computational tools already available. Two main tools will be developed. The first one will allow graphical editing of low-level Petri net models and will support interactive simulation. It will support a uniform way to specify hierarchical constructs, composition dependencies between models (allowing model's reusability), and crosscutting modification to those same models. To this end a simple algebraic language, with an associated graphical representation, will be defined and represented in PNML. The second ones are responsible for automatic code generation from PNML representations to ANSI C or VHDL code (for software or hardware implementations), that can be used for verification, simulation, and execution purposes. All three goals will have in common the same generated code for net execution. In the end, the project will allow an effective use of Petri nets as the system-level specification language within the co-design of embedded systems.